// ****************************************************************************** 
// Copyright     :  Copyright (C) 2018, Hisilicon Technologies Co. Ltd.
// File name     :  pmv_reg_offset_field.h
// Project line  :  K3
// Department    :  K3
// Author        :  Huawei
// Version       :  V100
// Date          :  2015/4/10
// Description   :  HiVcodecV100 VDEC
// Others        :  Generated automatically by nManager V4.2 
// History       :  Huawei 2018/04/10 10:02:42 Create file
// ******************************************************************************

#ifndef __PMV_REG_OFFSET_FIELD_H__
#define __PMV_REG_OFFSET_FIELD_H__

#define PMV_DPI2PMV_MBY_LEN    10
#define PMV_DPI2PMV_MBY_OFFSET 16
#define PMV_DPI2PMV_MBX_LEN    10
#define PMV_DPI2PMV_MBX_OFFSET 0

#define PMV_CTRL2CFG_PU_MBX_LEN    10
#define PMV_CTRL2CFG_PU_MBX_OFFSET 16
#define PMV_CTRL2CFG_PU_MBY_LEN    10
#define PMV_CTRL2CFG_PU_MBY_OFFSET 0

#define PMV_PMV_CYCLE_CNT_LEN    32
#define PMV_PMV_CYCLE_CNT_OFFSET 0

#define PMV_CTRL2CFG_PU_ST_LEN     3
#define PMV_CTRL2CFG_PU_ST_OFFSET  24
#define PMV_CTRL2CFG_TU_ST_LEN     4
#define PMV_CTRL2CFG_TU_ST_OFFSET  16
#define PMV_CTRL2CFG_CU_ST_LEN     2
#define PMV_CTRL2CFG_CU_ST_OFFSET  8
#define PMV_CTRL2CFG_CTB_ST_LEN    3
#define PMV_CTRL2CFG_CTB_ST_OFFSET 0

#define PMV_IPMD_ERR0_LEN    32
#define PMV_IPMD_ERR0_OFFSET 0

#define PMV_IPMD_ERR1_LEN    32
#define PMV_IPMD_ERR1_OFFSET 0

#define PMV_IPMD_ERR2_LEN    32
#define PMV_IPMD_ERR2_OFFSET 0

#define PMV_IPMD_ERR3_LEN    32
#define PMV_IPMD_ERR3_OFFSET 0

#define PMV_IPMD_ERR4_LEN    32
#define PMV_IPMD_ERR4_OFFSET 0

#define PMV_IPMD_ERR5_LEN    32
#define PMV_IPMD_ERR5_OFFSET 0

#define PMV_IPMD_ERR6_LEN    32
#define PMV_IPMD_ERR6_OFFSET 0

#define PMV_IPMD_ERR7_LEN    32
#define PMV_IPMD_ERR7_OFFSET 0

#define PMV_MV_MAX_MIN_LEN    32
#define PMV_MV_MAX_MIN_OFFSET 0

#define PMV_MV_SUM_LEN    32
#define PMV_MV_SUM_OFFSET 0

#define PMV_MV_CNT_LEN    32
#define PMV_MV_CNT_OFFSET 0

#endif // __PMV_REG_OFFSET_FIELD_H__
